Conventionally, in the field of audio signal acquisition, sonars, and wireless communications, a speech enhancement device by means of an adaptive microphone array and a wireless transceiver by means of an adaptive antenna array have been known, for example.
Such a device is capable of enhancing and receiving only a particular signal from a plurality of signal sources, which is an application of an adaptive array technique. As sensors, microphones, ultrasonic sensors, sonar receivers, and radio wave antennas may be used. Here, a case of using microphones as sensors will be described.
Hereinafter, in order to simplify the description, a case where microphones are arranged on a line at equal interval will be considered. Further, it assumes that a target audio source is sufficiently distant from the line on which the microphones are arranged, and that the direction of the target audio source is orthogonal to the line.
A microphone array filters signals input to a plurality of microphones, and then adds them to form a spatial filter. With this spatial filter, only a signal incoming from a predefined direction, or a switch target signal, is enhanced, and signals other than the target signal are attenuated.
An adaptive microphone array is an array of microphones having a function of adaptively varying the spatial filter characteristics.
As a configuration of an adaptive microphone array, a “generalized sidelobe canceller” disclosed in Non-Patent Document 1, the configuration disclosed in Non-Patent Document 2, the configuration disclosed in Non-Patent Document 3, the “frost beamformer” disclosed in Non-Patent Document 4, and the configuration disclosed in Non-Patent Document 5, have been known, for example.
A generalized sidelobe canceller, which is a basic adaptive array processing device disclosed in Non-Patent Document 1, includes a fixed beamformer, a blocking matrix circuit, and a multi-input canceller.
The blocking matrix circuit includes an adaptive blocking matrix circuit including adaptive filters. The fixed beamformer processes a plurality of sensor signals and enhances a target signal. The blocking matrix circuit suppresses the target signal included in the plurality of sensor signals, and relatively enhances interferences.
The adaptive blocking matrix circuit subtracts a pseudo target signal generated by the adaptive filters from the plurality of the sensor signals with the fixed beamformer output being used as a reference signal, and supplies to a multi-input canceller. The adaptive filter coefficient of the adaptive blocking matrix circuit is to be updated so as to minimize an output of the adaptive blocking matrix circuit using the fixed beamformer output and an output of the adaptive blocking matrix circuit.
The multi-input canceller subtracts a pseudo interference generated by the adaptive filters from the fixed beamformer output with an output of the blocking matrix circuit being used as a reference signal. In the signal obtained by the subtraction processing, the target signal is enhanced and the interference is suppressed, which becomes an array device output. Through the subtraction processing, correlation of the output signal with respect to the interference is eliminated.
The adaptive filter coefficient of the multi-input canceller is updated to minimize the multi-input canceller output using the blocking matrix circuit output and the multi-input canceller output.
As the fixed beamformer, a delay-and-sum beamformer which delays respective sensor signals and adds them, a filter-and-sum beamformer which filters and adds them, may be used. Those fixed beamformers are described in Non-Patent Document 6 in detail.
The delay-and-sum beamformer delays a plurality of sensor signals for only the unique number of samples of each signal, and after multiplying a unique coefficient by each signal, calculates the sum and outputs it. The delay time of each signal is set such that after each sensor signal is delayed, the phases of the target signal included therein will become the same. Consequently, the target signal included in the output of the delay-and-sum beamformer is enhanced.
On the other hand, for the interference incoming from a direction different from that of the target signal, as the phases are different from each other in the respective delayed signals, the interferences are offset each other by addition and attenuated. As such, in the output of the delay-and-sum beamformer, the target signal is enhanced and the interferences are attenuated.
The filter-and-sum beamformer has a configuration such that delaying and constant multiplying with respect to sensor signals in the delay-and-sum beamformer are replaced with filters. Those filters can be made such that effects of delaying and constant multiplying in the delay-and-sum beamformer differ with respect to respective frequencies. As such, the target signal enhancing effect is more enhanced compared to that of the delay-and-sum beamformer with respect to signals in which spectrum is not flat.
The adaptive blocking matrix circuit and the multi-input canceller include a plurality of adaptive filters. As such adaptive filters, structures of FIR filters, IIR filters, and lattice filters may be used. Further, as a coefficient update algorithm of those adaptive filters, NLMS algorithm (learning identification method or normalized LMS algorithm), RLS algorithm (sequential minimum square method), a projection algorithm, a gradient method, an LS algorithm (minimum square method), a block adaptive algorithm, and adaptive algorithm of transform region may be used.
Further, when performing coefficient updating, a tap coefficient constraint adaptive algorithm applying constraint to a coefficient value to be newly calculated, a leak adaptive algorithm, and a tap norm constraint adaptive algorithm applying constraint to a coefficient value norm may be used. Those coefficient update algorithms with constraint are described in Non-Patent Document 7 in detail.
In the coefficient update of the adaptive blocking matrix circuit, the enhanced interference becomes an unnecessary signal for coefficient update, and in the coefficient update of the multi-input canceller, the enhanced target signal becomes an unnecessary signal for coefficient update, both of which disturb coefficient update. As such, in either case, the adaptive filter coefficient is disturbed, so that uncomfortable breathing noises are caused in the output signal of the array processing device.
In order to prevent the noises, it is necessary to make the coefficient update step size small. However, a small step size causes a delay of the speed with which the characteristics of the adaptive blocking matrix circuit follows the movement of the target signal, so that the quality of the adaptive array device output which is the final output is deteriorated.
In order to solve this problem, adaptive mode control devices are disclosed in Non-Patent Document 8 and Non-Patent Document 9.
Here, in the method disclosed in Non-Patent Document 8, presence of the interference is detected using correlation between signals obtained from adjacent sensors. By halting coefficient update when the interference is detected, a fine output of the adaptive array device can be obtained. In this method, as it is developed to be applied for hearing aid, microphone intervals are set to be wide, and the signal band is restricted from about 600 Hz to 1200 Hz to prevent spatial aliasing.
In an application by using normal audio signals, as the audio power may sometimes also be present outside this frequency range, presence of interferences cannot be detected accurately. Further, as it is configured to control coefficient update of only multi-input canceller while assuming a fixed blocking matrix circuit, it cannot be directly applied to the adaptive blocking matrix circuit.
In the method disclosed in Non-Patent Document 9, presence of interference is detected using a power ratio of the target signal to the interference (SIR). The power estimation of the target signals is performed using a fixed beamformer output. The power estimation of the interference is performed using an output of the adaptive blocking matrix circuit. The ratio of these estimation values (that is, estimation values of SIR) is compared with a threshold.
If the SIR (power ratio of target signal to interference) is larger than the threshold, as the target signal is prevailing in the input signal and effects of the target signal are small, coefficient update will be performed in the adaptive blocking matrix circuit. In contrast, as the target signal interrupts coefficient update of the multi-input canceller, coefficient update of the multi-input canceller is halted.
If SIR is smaller than the threshold, the coefficient update is halted in the adaptive blocking matrix circuit, and coefficient update is performed in the multi-input canceller.
In this method, however, the adaptive blocking matrix circuit does not exhibit sufficient performance until the adaptive filter coefficient included in the adaptive blocking matrix circuit is converged, so that estimation of the interference power becomes inaccurate. As such, particularly in the initial timing of operation, errors may be easily caused in the coefficient update control of the adaptive blocking matrix circuit and the multi-input canceller, leading to deterioration in the output audio of the array processing device.
In order to solve this problem, Non-Patent Document 10 discloses an adaptive mode control device having a dedicated fixed blocking matrix circuit.
In the method disclosed in Non-Patent Document 10, power estimation of interference is performed using a dedicated fixed blocking matrix circuit. As such, desired performance can be achieved irrespective of the convergence of the adaptive filter coefficient included in the adaptive blocking matrix circuit, which enables accurate interference power estimation.
Next, FIG. 8 shows an adaptive mode processing device of another conventional example.
The conventional example (adaptive mode processing device) shown in FIG. 8 is configured such that the above-described adaptive array processing device disclosed in Non-Patent Document 9 is combined with the adaptive mode control device disclosed in Non-Patent Document 10.
In this configuration, the adaptive array processing device disclosed in Non-Patent Document 9 includes a fixed beamformer 200, an adaptive blocking matrix circuit 300, a delay element 400, and a multi-input canceller 500. Further, the adaptive mode control device includes a blocking matrix circuit 310, an SIR estimation section 700, and a comparator section 800a. 
The fixed beamformer 200 of the adaptive array processing device processes signals obtained from M pieces of sensors 1000 to 100M-l to thereby enhance a target signal.
The adaptive blocking matrix circuit 300 suppresses the target signal included in the plurality of sensor signals, and relatively enhances interference. This is achieved by generating pseudo target signals by a plurality of adaptive filters with an output of the fixed beamformer 200 being used as a reference signal, and subtracting them from signals obtained from M pieces of the sensors 1000 to 100M-l. In that case, the coefficient of the adaptive filter is updated such that an output of the adaptive blocking matrix circuit 300 is minimized, by using an output of the fixed beamformer 200 and an output of the adaptive blocking matrix circuit 300.
The delay element 400 delays an output of the fixed beamformer 200 by L sample, and supplies it to the multi-input canceller 500. The value of L is set such that the phases of the target signal component in the output of the delay element 400 and the target signal component in the output of the adaptive blocking matrix circuit 300 become the same. For example, it may be set to the sum of the group delay time of the fixed beamformer 200 and a time corresponding to about one fourth to a half of the number of taps of the adaptive blocking matrix circuit 300.
The multi-input canceller 500 receives and performs processing on a signal formed by delaying the output signal of the fixed beamformer 200 and an output signal of the adaptive blocking matrix circuit 300 to thereby suppress interference, and further enhances the target signal relatively. The multi-input canceller 500 receives the enhanced interference as a reference signal from the adaptive blocking matrix circuit 300, and as a signal correlated to this signal, generates a pseudo interference by adaptive filters. The generated pseudo interference is subtracted from the enhanced target signal which is an output of the delay element 400. This output is transmitted to the output terminal 600.
The adaptive filter coefficient of the multi-input canceller 500 is updated, using the output of the adaptive blocking matrix circuit 300 and the output signal transmitted to the output terminal 600, so as to minimize the output signal.
The output of the adaptive blocking matrix circuit 300 to be used in coefficient update of the adaptive blocking matrix circuit 300 includes interference and a suppressed target signal. However, as the adaptive blocking matrix circuit 300 can affect only the target signal component, the interference is output as it is. In other words, the adaptive blocking matrix circuit 300 can minimize only the target signal component, and the interference component included in this output disturbs coefficient update.
With the disturbing, the adaptive filter coefficient included in the adaptive blocking matrix circuit 300 is disordered, so that the signal transmitted to the multi-input canceller 500 becomes unstable. As a result, the output of the multi-input canceller 500, that is, the output of the entire adaptive array device, is disturbed, causing uncomfortable breathing noises.
In order to prevent the noises, SIR is estimated using the plurality of sensor signals, and the coefficient update of the adaptive blocking matrix circuit 300 is controlled using the estimated value.
Similarly, the target signal enhanced in the coefficient update of the multi-input canceller 500 becomes an unnecessary signal for coefficient update, disturbing the coefficient update. With the disturbing, the adaptive filter coefficient included in the multi-input canceller 500 is disordered, causing uncomfortable breathing noises in the adaptive array device output. As such, same as the adaptive blocking matrix circuit 300, SIR of the plurality of sensor signals is estimated, and coefficient update of the multi-input canceller 500 is controlled with the estimated value.
The SIR estimation section 700 performs SIR estimation using the output of the blocking matrix circuit 310 and the output of the fixed beamformer 200.
Power estimation of the target signal is performed using the output of the fixed beamformer 200. Power estimation of the interference is performed using the output of the fixed blocking matrix circuit 310. The two pieces of estimated power information are supplied to the SIR estimation section 700, and the ratio is calculated to serve as an estimated SIR value.
The estimated SIR value calculated by the SIR estimation section 700 is transmitted from the SIR estimation section 700 to the comparator section 800. The comparator section 800a compares the estimated SIR value with a threshold.
If the estimated SIR value is larger than the threshold, as the target signal is prevailing in the input signal so that effect of the interference is small, a control signal for performing coefficient update in the adaptive blocking matrix circuit is generated, and the signal is supplied to the adaptive blocking matrix circuit 300. In contrast, as the target signal disturbs in the coefficient update of the multi-input canceller 500, a control signal for halting coefficient update of the multi-input canceller 500 is generated, and the signal is supplied to the multi-input canceller 500.
If the estimated SIR value is smaller than the threshold, coefficient update is halted in the adaptive blocking matrix circuit, and a signal for performing coefficient update in the multi-input canceller is generated and supplied to the adaptive blocking matrix circuit 300 and the multiple input canceller 500, respectively.
FIG. 9 shows an exemplary configuration of the fixed blocking matrix circuit 310, which is configured of a subtracter 311 for calculating the difference between the ith sensor signal Xi(k) and the (i+1)th sensor signal Xi+1(k).
Here, k is an indicator showing the time, and i is an integer in a range from 0 to M−2. The output signal Z(k) of the blocking matrix circuit 310 becomes Xi(k)-Xi+1(k). With respect to the target signal incoming from the front, Xi(k) and Xi+1(k) are equal, so that Z(k)=0 is established. With respect to interference incoming from another direction, Z(k) is not zero. As such, the fixed blocking matrix circuit 310 has an advantage of suppressing the target signal.
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